This invention relates generally to integrated circuit voltage regulators for high speed and high frequency applications, and more particularly, the invention relates to such a regulator for low voltage circuits.
Many circuit applications are now operating in a voltage range from 5 V down to 3 V and below. A typical voltage regulator reduces the output variation to a much smaller range than the input voltage thus minimizing the total bias current variation against bias voltage.
For high speed and high frequency circuits, silicon bipolar transistors and heterojunction bipolar transistors are employed in the voltage regulators. Comparing these two transistor technologies, a Gallium Arsenide HBT has a V.sub.be of 1.4 V during operation versus 0.8 V for a silicon bipolar transistor. The high V.sub.be of the GaAs HBT increases the difficulty in designing a regulator at low voltages with a power down feature. This can best be illustrated by reference to the conventional voltage regulator illustrated in FIG. 1.
Referring to FIG. 1, an input voltage, Vin is passed through a transistor Q1 to provide a regulated output voltage Vout. Resistors R2, R3 are serially connected between Vout and circuit ground with a common terminal being provided with a reference voltage, Vref, which controls the bias on bipolar transistor Q2. Transistor Q2 is connected between the base of transistor Q1 and circuit ground for providing a bias voltage to transistor Q1. A resistor R1 connects the collector of transistor Q2 to Vin.
In a typical application, the circuit of FIG. 1 has the following relationships:
______________________________________ Vref is about 1.4V Vout &gt; Vref = 1.4V V1 = Vout + V.sub.beQA1 &gt; 2.8V Vin = V1 + .DELTA.V .sup..about. 3V, with .DELTA.V .about. ______________________________________ 0.2V
From the foregoing analysis, it will be appreciated that the circuit has difficulty in functioning when Vin drops below 3 V. Even at 3 V, it is difficult to add a power down or power saving feature to the circuit of FIG. 1. The power down feature is illustrated in the voltage regulator of FIG. 2 which is identical to the voltage regulator of FIG. 1 with the addition of transistor Q3 serially connected between transistor Q1 and Vout with a power saving voltage, PS, applied through resistor R4 to the base of transistor Q3. When PS is below 1.3 V, the power saving transistor Q3 is turned off. As a result, there is no current flowing out of Vout and no current flows through transistors Q1 and Q2. However, when the voltage PS is set to Vout (regulated) plus V.sub.be of transistor Q3, transistor Q3 is in a saturation mode with a very low V.sub.ce, which can be less than 0.5 V. The emitter voltage of transistor Q1 is at a voltage greater than Vout+V.sub.ce(Q3), or approximately 1.9 V. Therefore, Vin must be greater than 3.5 V. This increase comes from the collector emitter voltage drop of transistor Q3.
Accordingly, the use of a low input voltage presents a challenge to bipolar technology in providing a voltage regulator. A GaAs HBT faces the challenge for Vout equal 3 to 3.5 V, and the silicon bipolar transistor faces the same challenge at about 2 V.